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[dlmodule] fix: uninitialized globals in relocatable modules - #11915

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@usualtreee usualtreee commented Oct 21, 2026 •

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拉取/合并请求描述:(PR description)

为什么提交这份PR (why to submit this PR)

修复 issue #5705(动态模块中未初始化全局变量访问异常,2022-03 报告,至今 open)。该问题在最新 master(1c801efa)上仍可复现:dlmodule_load_relocated_object()(ET_REL 动态模块加载路径,Cortex-M 等使用 RT_USING_MODULE 的 BSP 走此路径)存在以下缺陷,导致动态模块中未初始化全局变量的地址重叠/无法重定位:

  1. BSS 段(SHT_NOBITS)加载后分配指针不推进,多个 NOBITS 段会重叠在同一块内存;
  2. 段符号重定位公式缺少段链接地址(sh_addr)修正;
  3. SHN_COMMON 符号(tentative 定义的未初始化全局变量)重定位被静默跳过(读 shdr[0xfff2] 得到垃圾段名后不匹配);
  4. 该路径从不构建 module->symtab,dlsym() 对 ET_REL 模块永远失败。

你的解决方案是什么 (what is your solution)

  1. BSS 段加载完成后推进分配指针 ptr += shdr[index].sh_size;;
  2. rodata/bss/data 段符号重定位统一为 section_load_addr - sec_sh_addr + sym->st_value,与 text 段处理方式一致;
  3. 为 SHN_COMMON 符号分配公共块(common block):尺寸核算阶段按 st_value(对齐要求)对齐、st_size 累计计入模块总大小;重定位阶段先于段名匹配处理 SHN_COMMON(避免越界读 shdr[0xfff2]),地址 = 公共块基址 + 符号在块内偏移(与尺寸核算共用同一算法,保证一致);
  4. 从 .symtab 收集 GLOBAL FUNC 符号构建 module->symtab,使 dlsym() 对 ET_REL 模块可用(与 ET_DYN 路径从 .dynsym 构建对齐)。

修改文件:components/libc/posix/libdl/dlelf.c、dlelf.h(新增 SHN_COMMON 宏)。

请提供验证的bsp和config (provide the config and bsp)

  • BSP: bsp/qemu-vexpress-a9

  • .config: 需要开启 CONFIG_RT_USING_MODULE=y(RT_USING_DFS / RT_USING_DFS_ROMFS / RT_USING_POSIX_FS 为该 BSP 默认配置,无需改动)

  • 验证方法:qemu-system-arm 运行时加载三个测试动态模块:

    • test_bss.mo:ET_DYN(文档标准 -shared -fPIC -fcommon 流程)
    • test_kp.mo:ET_DYN + 内核符号导入(rt_kprintf 经 GOT),覆盖内核符号解析路径
    • test_bss_rel.mo:ET_REL(-r、非 PIC、-fcommon;rx_sem/serial 为 SHN_COMMON),覆盖本次修复路径
      每个模块检查未初始化全局变量地址互不重叠,并做特征值写入回读(serial=0xdeadbeef、rx_sem=0xaa55)验证内存互不踩踏。
    • 修复前(master 1c801ef):test_bss_rel.mo dlsym FAILED;
    • 修复后:dlsym 成功,rx_sem=0x600d2008、serial=0x600d2004 互不重叠,读写回读通过;两个 ET_DYN 模块修复前后结果一致,无回归。
  • action: (待触发;可在 fork 仓库 Actions 中运行 manual_dist 编译 qemu-vexpress-a9 后贴链接)

当前拉取/合并请求的状态 Intent for your PR

必须选择一项 Choose one (Mandatory):

  • 本拉取/合并请求是一个草稿版本 This PR is for a code-review and is intended to get feedback
  • 本拉取/合并请求是一个成熟版本 This PR is mature, and ready to be integrated into the repo

代码质量 Code Quality:

我在这个拉取/合并请求中已经考虑了 As part of this pull request, I've considered the following:

  • 已经仔细查看过代码改动的对比 Already check the difference between PR and old code
  • 代码风格正确,包括缩进空格,命名及其他风格 Style guide is adhered to, including spacing, naming and other styles
  • 没有垃圾代码,代码尽量精简,不包含#if 0代码,不包含已经被注释了的代码 All redundant code is removed and cleaned up
  • 所有变更均有原因及合理的,并且不会影响到其他软件组件代码或BSP All modifications are justified and not affect other components or BSP
  • 对难懂代码均提供对应的注释 I've commented appropriately where code is tricky
  • 代码是高质量的 Code in this PR is of high quality
  • 已经使用clang-format 源码格式化工具确保格式符合RT-Thread代码规范 This PR has been formatted with clang-format and complies with RT-Thread code specification
  • 如果是新增bsp, 已经添加ci检查到.github/ALL_BSP_COMPILE.json 详细请参考链接BSP自查

Fix the loader of relocatable (ET_REL) dynamic modules so that
uninitialized global variables get their own storage and correct
addresses:

1. Advance the allocation pointer after loading a BSS (SHT_NOBITS)
   section, so multiple NOBITS sections no longer overlap in memory.
2. Relocate section symbols with
   section_load_addr - sec_sh_addr + sym->st_value, matching how text
   symbols are already handled.
3. Allocate a common block for SHN_COMMON symbols (tentative
   definitions of global variables) and relocate every reference to it
   instead of silently skipping them.
4. Build the module symbol table from .symtab for ET_REL modules so
   that dlsym() can resolve the module's global functions.

Verified on bsp/qemu-vexpress-a9 with CONFIG_RT_USING_MODULE=y: before
the fix an ET_REL module fails dlsym(), after the fix its globals get
correct non-overlapping addresses and round-trip reads/writes succeed,
and ET_DYN (-shared) modules are unaffected.

Refs: RT-Thread#5705
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👋 感谢您对 RT-Thread 的贡献!Thank you for your contribution to RT-Thread!

为确保代码符合 RT-Thread 的编码规范,请在你的仓库中执行以下步骤运行代码格式化工作流(如果格式化CI运行失败)。
To ensure your code complies with RT-Thread's coding style, please run the code formatting workflow by following the steps below (If the formatting of CI fails to run).


🛠 操作步骤 | Steps

  1. 前往 Actions 页面 | Go to the Actions page
    点击进入工作流 → | Click to open workflow →

  2. 点击 Run workflow | Click Run workflow

  • Use workflow from 保持默认分支(通常为 master)
    Keep the default branch (usually master) in Use workflow from
  • 在 branch 输入框填写 PR 分支 fix/dlmodule-bss-common-overlap
    Enter PR branch fix/dlmodule-bss-common-overlap in the branch field
  • 设置需排除的文件/目录(目录请以"/"结尾)
    Set files/directories to exclude (directories should end with "/")
  1. 等待工作流完成 | Wait for the workflow to complete
    格式化后的代码将作为独立提交推送至你的分支。
    The formatting changes will be pushed to your branch as a separate commit.

完成后,提交将自动更新至 fix/dlmodule-bss-common-overlap 分支,关联的 Pull Request 也会同步更新。
Once completed, commits will be pushed to the fix/dlmodule-bss-common-overlap branch automatically, and the related Pull Request will be updated.

如有问题欢迎联系我们,再次感谢您的贡献!💐
If you have any questions, feel free to reach out. Thanks again for your contribution!

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📌 Code Review Assignment

🏷️ Tag: components

Reviewers: @Maihuanyi

Changed Files (Click to expand)
  • components/libc/posix/libdl/dlelf.c
  • components/libc/posix/libdl/dlelf.h

🏷️ Tag: components_libc

Reviewers: @GorrayLi @mysterywolf

Changed Files (Click to expand)
  • components/libc/posix/libdl/dlelf.c
  • components/libc/posix/libdl/dlelf.h

📊 Current Review Status (Last Updated: 2026-10-21 21:10 CST)


📝 Review Instructions

  1. 维护者可以通过单击此处来刷新审查状态: 🔄 刷新状态
    Maintainers can refresh the review status by clicking here: 🔄 Refresh Status

  2. 确认审核通过后评论 LGTM/lgtm
    Comment LGTM/lgtm after confirming approval

  3. PR合并前需至少一位维护者确认
    PR must be confirmed by at least one maintainer before merging

ℹ️ 刷新CI状态操作需要具备仓库写入权限。
ℹ️ Refresh CI status operation requires repository Write permission.

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CLAassistant commented Oct 21, 2026 •

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