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P0 RECEIVER: actual canonical SV phase/MAC proof on external GM PTP lease - #256

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masarray wants to merge 15 commits into
fix/p0-ptp-sv-phase-freshness-20261020from
fix/p0-ptp-receiver-sv-timeline-proof-20261020
Closed

masarray wants to merge 15 commits into
fix/p0-ptp-sv-phase-freshness-20261020from
fix/p0-ptp-receiver-sv-timeline-proof-20261020

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@masarray

@masarray masarray commented Oct 20, 2026 •

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P0 continuation stacked on #254 (itself stacked on #252); no merge to main before physical relay acceptance.

Proven source-level failure: g_sv_timeline_phase_qualified was initialized false but never promoted anywhere. RECEIVER with real external GM discipline therefore could never emit qualified AUTO SV. Sparse descriptor evidence also called ar_ptp_lab_source_generation(), which intentionally returns zero for RECEIVER, making every receiver MAC observation invalid.

Code:

  1. Shared existing clock lease before/after sparse real canonical descriptor timestamp applies to SOURCE and RECEIVER. Explicit source-identity/GM generation, session, fault, sample epoch and phase uncertainty continuity; no host timestamp substitute.
  2. The existing 10-consecutive-live-epoch gate + 2 measured MAC pairs remains, plus receiver PTP discipline LOCKED. Global claim still solely from measured GM traceability; receiver holdover without independent error bound is UNSYNC; SOURCE is never GLOBAL.
  3. Write/clear the previously unused RECEIVER SV timeline atomic, cancel immediately on measured unlock, PTP STOP, publisher STOP, skipped slot, MAC/TX fault, observer stall or lease/source change; operator AUTO return invalidates stale claims before mode publish.
  4. Permit pre-START dry GPTimer phase alignment for qualified RECEIVER GM as well as SOURCE; zero SV before explicit START, zero early smpSynch claim, same session lease/clock generation enforced at START. This can reduce post-START phase acquisition without bypassing independent live MAC proof.
  5. Firmware AUTO resolver is now linked into existing strict GCC/Clang/MSVC smp_synch_policy_tests, proving receiver GM-only=0, true phase+MAC gate and traceable GM=2, loss/relock=0, source-only=1 and manual override invalidation. Additional portable MAC/GM generation/fault and receiver preflight tests. Correct stale Kconfig descriptor cadence comment 16→2.

Important blockers: This repairs deterministic code path only. ESP-IDF 5.5.4 MAC TX descriptor polling is experimental and remains a real-time risk; must instrument 4kfps, phase, 120/3600s SV+PTP PCAP, independent time source, 10x cold/warm, real external GM and target relay (IED). No certification, no auto-flash, no source/receiver binary equivalence, no main merge.

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📝 Code Review ✅ Completed 2026-10-20T04:55:10.484954Z 72d5163 PR opened
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💡 Codex Review

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Reviewed commit: 72d5163546

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Comment on lines +1121 to +1123
if (result != ar::iec61850::time_sync::SvTxEvidenceResult::measured)
smp_synch_set_source_local_qualified(false);
smp_synch_set_receiver_timeline_qualified(false);

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P1 Badge Keep receiver qualification after measured timestamps

When external-GM RECEIVER mode has qualified, every scheduled descriptor timestamp enters this block, but this call clears the receiver timeline unconditionally—even when result is measured. The 1 Hz observer does not restore it until roughly 250 ms later, so about 1,000 subsequent 4 kHz frames advertise smpSynch=0 every two seconds despite valid evidence. Move this revocation under the non-measured-result condition alongside the source revocation.

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M3.H release=main reconciliation — 2026-10-24

Verified product baseline is a922e9bdba4e57a4e88406eb83344455dd8ff142 (ESP32-P4 firmware Build ID a922e9bdba4e57a4); consolidated PR #299 is MERGED to main with 14/14 integration checks passing. The official M3.H Stable tag and tested source are ancestors of main.

This PR has a distinct historical/divergent change scope and is not part of the immutable shipped M3.H baseline. It remains DRAFT / NOT READY for merge; do not merge against an obsolete stacked base or count its tests as final M3.H acceptance. Reconcile only still-needed unique behavior into a fresh branch from current main, with implementation-level comparison, all affected CI tests, and targeted ESP32-P4 FAT where relevant. If superseded, close with an explicit feature-by-feature disposition instead of importing old firmware wholesale.

Canonical closure record: https://github.com/masarray/arstack61850/blob/main/docs/integration/M3H_MAINLINE_RELEASE_SOURCE_CLOSURE_2026-10-24.md .

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PR archival decision — M3.H release hygiene (2026-10-24)

CLOSED as SUPERSEDED HISTORICAL IMPLEMENTATION — NOT MERGED and NOT marked as a completed feature.

This branch diverges from current main; its unique changes have not passed the validated M3.H release gate. The old source and discussion stay reachable for traceability. Future implementation must be a new, narrowly scoped PR based on current main, with focused CI and hardware evidence where applicable. Closing the obsolete PR removes misleading release-ready queue items while preserving the unresolved feature requirements.

Evidence ledger: M3.H Mainline Source Closure.

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